AI Memory Shortage Locked Through 2030: Computex 2026 Brings Agent Economy, HBM Crisis
SK Group Chairman Chey Tae-won warned at Computex 2026 in Taipei that the global shortage of high-bandwidth memory (HBM) for AI chips will persist until at least 2030, despite SK Hynix’s plan to double its wafer production capacity within five years. Nvidia CEO Jensen Huang publicly urged SK Hynix to accelerate production by writing 'Please Make More' on an HBM4E wafer, highlighting the structural demand-supply imbalance in AI infrastructure." "article": "At Computex 2026 in Taipei, SK Group Chairman Chey Tae-won confirmed that the global shortage of high-bandwidth memory (HBM) for AI chips will continue through 2030, despite efforts to address it. He announced SK Hynix’s plan to double its wafer production capacity over five years, though he acknowledged this would not fully resolve the gap. Hours later, Nvidia CEO Jensen Huang visited the SK Hynix booth and wrote 'Please Make More' on an HBM4E wafer, underscoring the urgency of the supply-demand imbalance. The shortage stems from HBM’s unique architecture, which stacks DRAM vertically for ultra-high-speed data transfer—up to 1.2 terabytes per second compared to 50–100 GB/s for DDR5. This requires advanced packaging like TSMC’s CoWoS process, which bonds GPU and HBM dies onto a silicon interposer. TSMC has expanded CoWoS capacity from 35,000 wafer starts per month in late 2024 to a projected 120,000–130,000 by late 2026, but demand still outstrips production. A deeper issue is wafer economics: producing HBM3E consumes three times the wafer capacity of DDR5 for the same memory capacity, according to Micron. TrendForce estimates one gigabyte of HBM requires four gigabytes of standard DRAM in wafer area. This forces manufacturers to prioritize HBM, even though it yields three to five times higher revenue per wafer, exacerbating shortages across consumer and enterprise memory markets. The structural challenge means even doubling capacity won’t immediately ease the crunch. SK Hynix’s expansion and Nvidia’s plea reflect the critical role of HBM in AI accelerators like Nvidia’s Blackwell and Vera Rubin chips, which rely on CoWoS for performance. Without sufficient HBM, AI progress risks stalling, as the bottleneck extends beyond 2030.
At Computex 2026 in Taipei, SK Group Chairman Chey Tae-won confirmed that the global shortage of high-bandwidth memory (HBM) for AI chips will continue through 2030, despite efforts to address it. He announced SK Hynix’s plan to double its wafer production capacity over five years, though he acknowledged this would not fully resolve the gap. Hours later, Nvidia CEO Jensen Huang visited the SK Hynix booth and wrote 'Please Make More' on an HBM4E wafer, underscoring the urgency of the supply-demand imbalance. The shortage stems from HBM’s unique architecture, which stacks DRAM vertically for ultra-high-speed data transfer—up to 1.2 terabytes per second compared to 50–100 GB/s for DDR5. This requires advanced packaging like TSMC’s CoWoS process, which bonds GPU and HBM dies onto a silicon interposer. TSMC has expanded CoWoS capacity from 35,000 wafer starts per month in late 2024 to a projected 120,000–130,000 by late 2026, but demand still outstrips production. A deeper issue is wafer economics: producing HBM3E consumes three times the wafer capacity of DDR5 for the same memory capacity, according to Micron. TrendForce estimates one gigabyte of HBM requires four gigabytes of standard DRAM in wafer area. This forces manufacturers to prioritize HBM, even though it yields three to five times higher revenue per wafer, exacerbating shortages across consumer and enterprise memory markets. The structural challenge means even doubling capacity won’t immediately ease the crunch. SK Hynix’s expansion and Nvidia’s plea reflect the critical role of HBM in AI accelerators like Nvidia’s Blackwell and Vera Rubin chips, which rely on CoWoS for performance. Without sufficient HBM, AI progress risks stalling, as the bottleneck extends beyond 2030.
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