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XpressConnect™ PCIe® 6.0 and CXL 3.1 Retimers Address Latency and Signal‑Integrity Challenges in AI Data Centers

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XpressConnect™ PCIe® 6.0 and CXL 3.1 Retimers Address Latency and Signal‑Integrity Challenges in AI Data Centers

Microchip Technology launched XpressConnect™ PCIe® 6.0 and CXL 3.1 retimers to address latency and signal-integrity challenges in AI data centers, offering sub-12 ns latency and compatibility with existing platforms. The devices are designed to extend signal reach, improve GPU utilization, and integrate with Microchip’s broader data center solutions ecosystem, including Switchtec™ switches and Flashtec™ NVMe controllers.

Microchip Technology introduced its XpressConnect™ PCIe® 6.0 and CXL 3.1 retimers to tackle growing latency and signal-integrity issues in AI data centers, where rising interconnect speeds (up to 64 GT/s) limit system scale. The retimers extend signal reach beyond PCIe Gen 5 and Gen 6 electrical limits, enabling flexible designs for baseboards, riser cards, and cabled interconnects while meeting thermal and power constraints. With a pin-to-pin latency of less than 12 ns—80% lower than PCIe 6.0 specifications—they improve AI accelerator and GPU efficiency by reducing data stalls in high-density clusters. The solution complements Microchip’s data center portfolio, including 3-nm Switchtec™ PCIe Gen 6 switches, Adaptec® SmartRAID controllers, and Flashtec™ NVMe controllers, offering pre-validated interoperability. It also integrates with PCIe Gen 3, 4, and 5 platforms to accelerate deployment and supports ChipLink diagnostics for real-time link monitoring via 2D eye capture and PAM4 telemetry. This reduces troubleshooting time and total cost of ownership for operators. Designed as an industry-standard drop-in solution, the retimers support flexible link configurations (1×16, 2×8, 4×4) and align with retimer footprint guidelines, minimizing vendor lock-in risks for hyperscalers. Features like hot-plug support and end-to-end data integrity ensure enterprise-grade reliability. Microchip’s ChipLink tools provide in-band debug, diagnostics, and configuration via a graphical user interface, further streamlining AI fabric management. The launch addresses a critical bottleneck in AI data centers, where data movement—not compute—now limits performance. By enabling memory expansion and resource disaggregation, the retimers help architects reclaim underutilized GPU resources and build more scalable, power-efficient AI fabrics. Microchip’s solutions aim to reduce integration complexity while supporting the evolving demands of high-bandwidth AI workloads.

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